1. Field of the Invention
The present invention relates generally to semiconductor memory devices and, more particularly, to methods of manufacturing semiconductor devices.
2. Description of the Related Art
Research into high integration of memory devices has been widespread. A memory device includes a plurality of word lines, a plurality of bit lines, and a plurality of memory cells. Memory devices are classified as volatile memory devices and non-volatile memory devices depending on characteristics of data stored in the memory cells. A non-volatile memory device maintains data stored in the memory cells even when power is cut off.
A non-volatile memory device includes a flash memory, a Magnetic Random Access Memory (MRAM), a Ferroelectric Random Access Memory (FRAM), a Phase-change Random Access Memory (PRAM), a Resistance Random Access Memory (RRAM), etc.
In order to implement a memory device, a technique, in which the word lines are aligned parallel to each other, and the bit lines are aligned parallel to each other, so that the bit lines cross the word lines, is widely used. The memory cells are disposed at intersections of the word lines and the bit lines. An electric signal may be applied to a selected one of the word lines and a selected one of the bit lines, so that data can be written to and read from a selected one of the memory cells.
Each of the word lines is electrically connected to the plurality of memory cells. Similarly, each of the bit lines is electrically connected to the plurality of memory cells. A snake current is generated through the non-selected memory cells that are connected to the selected bit line or the selected word line. A snake current can cause memory cells to malfunction.
To highly integrate a memory device, a technique, in which the memory cells are three-dimensionally stacked, has been employed. In this case, the snake current may be further increased.
Another method of three-dimensionally stacking memory cells is disclosed in U.S. Pat. No. 6,631,085B2 entitled “Three Dimensional Memory Array Incorporating Serial Chain Diode Stack” to Kleveland.